Texas Instruments OMAP5912 Reference Manual page 1003

Multimedia processor device overview and architecture
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Index
OCP to VIA synchronous bridge 44
On−chip/off−chip memory/peripheral access
latencies 45
P
Peripheral instantiation, layer 4 interconnect 35
Programming model, SSI interconnect 45
Protocols, Layer 4 interconnect 23
S
Shared peripherals 13
SSI interconnect 42
clock and reset 45
decode 44
52
Index
DMA/interrupt formatter 44
introduction 42
OCP to VIA asynchronous bridge 43
OCP to VIA synchronous bridge 44
programming model 45
Static switch, layer 4 interconnect 27
T
TIPB router, layer 4 interconnect 34
TIPB router connections, layer 4 interconnect 22
TIPB−OCP/OCP−TIPB wrapper, layer 4
interconnect 32
TIPB−OCP/OCP−TIPB wrapper for USBOTG, layer
4 interconnect 33
TIPB1−VIA/VIA−TIPB wrapper, layer 4
interconnect 32
SPRU758A

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