Texas Instruments OMAP5912 Reference Manual page 179

Table 58. OCPI Type of Abort Register (OCPI_ATYPER)
Bit Name
31:4 Reserved
3 Burst Error
2 PROTECT
1 TRGABORT
0 ADDDEC
Note: R/C is clear after read.
Table 59. OCPI Protection Register (OCPI_PR)
Bit Name
31:8 Reserved
7 API
6 RHEA_PUB
5 RHEA_PRIV
4 OCPMULT
3 OCPT2
2 OCPT1
1 EMIFF
0 EMIFS
SPRU749A
controller and is replaced by a simple read with a lock signal to the subtargets.
The READEX command must be followed by a write that matches the address
of the READEX as specified in Sonic's OCP specification. A READEX
command followed by a read results in unpredictable behavior.
Base Address = 0xFFFE C320, Offset = 0x0C
Function
Reserved. Must be 0.
Burst access to the MPUI or TIPB was requested.
Address hit a protected area.
Abort coming from the accessed target
Address decoding error (initiator sent unknown address)
The abort type register is cleared after being read(R/C). In other words,
reading the register once returns whatever bits correspond to the abort type.
On the next read, the register returns all 0s. Also a write to this register has no
effect.
Base Address = 0xFFFE C320, Offset = 0x14
Function
Reserved. Must be 0.
Access to MPUI is prohibited.
Access to MPU public TIPB is prohibited.
Access to MPU private TIPB is prohibited.
Access to OCPT multibank is prohibited.
Access to OCPT2 is prohibited.
Access to OCPT1 is prohibited.
Access to EMIFF is prohibited.
Access to EMIFS is prohibited.
When a bit in the OCPI_PR register is 1, access to the corresponding bit field
from the OCPI bus is protected (prohibited).
Traffic Controller
R/W
R
R/C
R/C
R/C
R/C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
OMAP3.2 Subsystem
Reset
0
0
0
0
0
Reset
0
1
1
1
1
1
1
1
1
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