Texas Instruments OMAP5912 Reference Manual page 483

Configuration
Table 36. Module Configuration Control 0 Register (MOD_CONF_CTRL_0)
Bit Name
31 CONF_MOD_UART3_CLK
_MODE_R
30 CONF_MOD_UART2_CLK
_MODE_R
29 CONF_MOD_UART1_CLK
_MODE_R
28 RESERVED
27:24 MOD_32KOSC_SW_R
23 CONF_MOD_MMC_SD_
CLK_REQ_R
22 CONF_MOD_DPRAM_
ENABLE_R
21 CONF_MOD_MSMMC_
VSS_HIZ_OVERRIDE
20 CONF_MOD_MMC_SD2_
CLK_REQ_R
Notes: 1) This function has been removed. Writing a 1 or a 0 to this register is acceptable. However, it is recommended
to write a 0, in case functions are added to this register space in the future.
66 Initialization
Base Address = 0xFFFE 1000, Offset Address = 0x80
Function
This bit determines the 48-MHz clock request
for UART3.
0: 48-MHz clock request is inactive.
1: 48-MHz clock request is active.
This bit determines the clock source of UART2.
0: UART_MCLKO from ULPD that can be either
the system clock or 32 kHz, depending on
system state and ULPD register programming.
1: 48 MHz.
This bit determines whether 48-MHz clock
request for UART1 is active.
0: 48-MHz clock request is inactive.
1: 48-MHz clock request is active.
See Note 1.
See Note 1.
This is the functional 48-MHz clock request for
the MMCSDIO1 interface.
This bit resets to 0. This corresponds to the
MMCSDIO1 clock not being requested. The
user must set the bit to 1 to request the clock
for the MMCSDIO1 interface.
See Note 1.
See Note 1.
This is the functional 48-MHz clock request for
the device MMC/SD 2 interface.
This bit resets to 0. This corresponds to the
MMC/SD clock not being requested. The user
must set the bit to 1 to request the clock for the
MMC/SD interface.
R/W Reset
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
SPRU752B