Texas Instruments OMAP5912 Reference Manual page 214

Clock Generation and Reset Management
Table 73. DSP Registers (Continued)
Name
DSP_CKOUT1
DSP_CKOUT2
Table 74. DSP Clock Control Prescaler Selection Register (DSP_CKCTL)
Bit Name
15:9 RESERVED
8 TIMXO
7 RESERVED
6:5 RESERVED
4 RESERVED
3:2 RESERVED
1:0 DSP_PERDIV
156 OMAP3.2 Subsystem
Base Address = 0xE100 8000 or 0x008000
Description
DSP reserved register 3
DSP reserved register 4
Base Address = 0xE100 8000 or 0x00 8000, Offset = 0x00
Function
Reading these bits gives undefined values. Writing to
them has no effect.
Selects either a CK_GEN2 frequency clock or the
input reference clock (CLK_REFIN) to supply timers.
0: The DSPTIM_CK clock frequency is the input
reference clock.
1: The DSPTIM_CK clock frequency is issued from
CK_GEN2 divided by 2.
This bit must be set to 1.
These bits must be set to 00.
This bit must be set to 1.
These bits must be set to 00.
Defines the prescaler value from CK_GEN2 to the
DSP external peripheral clock.
00: CK_GEN2
01: CK_GEN2/2
10: CK_GEN2/4
11: CK_GEN2/8
R/W Offset
R/W 0x1C
R/W 0x20
R/W Reset
R/W 0x00
R/W 1
R/W 1
R/W 00
R/W 1
R/W 00
R/W 00
SPRU749A