Table of Contents
Advertisement
Source Address and Block Size Alignment
Source Address Modes
SPRU755B
On the destination side, the accesses are fixed to 32 bits for external LCD
controller and 16 bits for OMAP LCD controller. There is no address alignment
because the LCD controller does not use addresses to access data from the
LCD channel.
Source memory accesses can be 32/16/8-bit or 4x32-bit burst accesses. The
LCD channel is compliant with the generic logical channel constraint; that is,
address must be aligned on data_type.
Data block size must be a multiple of the 32-bit for external LCD controller, and
a multiple of the 16-bit for OMAP LCD controller.
However, the data_type can still be 32/16/8-bit for both the OMAP and external
LCD controllers.
The four different LCD channel source address algorithms use the following
notations. The address mode descriptions are as follows:
A(n): Byte address of the element n within the transfer.
ES_B1: Element size in block 1 (in bytes): ES ∈ {1, 2, 4}.
ES_B2: Element size in block 2 (in bytes): ES ∈ {1, 2, 4}.
BS_B1: Block size of block 1 (in bytes).
BS_B1 = BB1 – TB1 = ES_B1 x EN_B1 x FN_B1
BS_B2: Block size of block 2 (in bytes).
BS_B2 = BB2 – TB2= ES_B2 x EN_B2 x FN_B2
BB1: Bottom address of block 1.
BB2: Bottom address of block 2.
TB1: Top address of block 1.
TB2: Top address of block 2.
DBM: Dual-block mode.
EN_B1: Number of elements within a frame of block 1.
EN_B2: Number of elements within a frame of block 2.
Element_counter_B1: Counter that is (re)initiated with the number of ele-
ments per frame or per transfer inside block 1. Decreased by one at each
element transferred. Initial value EN_B1 is configured in register DMA
channel element number, DMA_CEN.
Direct Memory Access (DMA) Support
System DMA
69
Advertisement
Chapters
Table of Contents
