Texas Instruments OMAP5912 Reference Manual page 970

Multimedia processor device overview and architecture
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Table 1.
MPU/DSP Peripheral Access (Continued)
MPU Domain
Module
MPU Start
Name
SoSSI
FFFB
AC00
SPI
FFFB
0C00
UART1
FFFB 0000
UART2
FFFB 0800
UART3
FFFB 9800
FAC
FFFB A800 FFFB
USB
FFFB 4000
client
USB host
FFFB A000 FFFB A3FF
USB OTG
FFFB 0400
2
I
C
FFFB 3800
multi-
master
µWire
FFFB 3000
HDQ
FFFB
1-Wire
C000
STI
FFFE A000 FFFE A7FF
(reserved)
OMAP5912
FFFE 5800
JTAG (test)
BCM (test)
FFFE 3800
Production
FFFE 2000
ID (test)
Note:
The SSI and the GDD modules are on the L3-OCP2 port and thus are seen as part of memory port interface.
SPRU758A
MPU End
MPU TIPB
Bus Type
FFFB AFFF Shared
FFFB 0FFF
Shared
FFFB 03FF
Shared
FFFB 0BFF
Shared
FFFB 9BFF
Shared
Shared
ABFF
FFFB 43FF
Shared
Shared
FFFB 07FF
Shared
FFFB 3BFF
Shared
FFFB 33FF
Shared
FFFB C3FF Shared
Private
FFFE 5FFF
Private
FFFE 3FFF
Private
FFFE 27FF
Private
DSP Domain
L4 Controler
DSP Start
Switch
Semi-static
E101 0C00
Semi-static
E101 0000
Semi-static
E101 0800
Semi-static
E101 9800
Semi-static
E101 3800
Dynamic
E101 A400
Peripheral Interconnects
Shared Peripherals
DSP End
DSP TIPB
Bus Type
E101
Shared
0FFF
E101
Shared
07FF
E101
Shared
0BFF
E101
Shared
9BFF
E101
Shared
3BFF
E101
Shared
A7FF
19

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