Texas Instruments OMAP5912 Reference Manual page 713

Table 47. Global DMA Capability Register 2 (DMA_CAPS_2) (Continued)
Bit Name
2 SSIAC
1 SPIAC
0 SCAC
Table 48. Global DMA Capability Register 3 (DMA_CAPS_3)
Bit Name
15:6 RESERVED
5 CCC
4 IC
3 ARC
2 AEC
SPRU755B
Base Address = 0xFFFE DC00, Offset = 0x56
Function
Source single-index address capability:
0: Does not support single-index address mode in source port.
1: Supports single-index address mode in source port.
Source post-increment address capability:
0: Does not support post-increment address mode in source port.
1: Supports post-increment address mode in source port.
Source constant address capability:
0: Does not support constant address mode in source port.
1: Supports constant address mode in source port.
Base Address = 0xFFFE DC00, Offset = 0x58
Function
Reserved
Channel chaining capability:
0: Does not support logical channel chaining capability.
1: Supports logical channel chaining capability.
LCh interleave capability:
0: Does not support logical channel interleave capability.
1: Supports logical channel interleave capability.
Autoinit and repeat capability:
0: Does not support repeat feature in autoinitialization
mode.
1: Supports repeat feature in autoinitialization mode
(supported only in OMAP 3.0/1 compatible mode).
Autoinit and End_prog capability:
0: Does not support End_Prog feature in autoinit mode.
1: Supports End_Prog feature in autoinit mode (supported
only in OMAP 3.0/1 compatible mode).
Direct Memory Access (DMA) Support
System DMA
R/W Reset
R 1
R 1
R 1
R/W Reset
R ND
R 1
R 1
R 1
R 1
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