Texas Instruments OMAP5912 Reference Manual page 215

Table 75. DSP Idle Enable Control Register 1 (DSP_IDLECT1)
Bit Name
15:9 RESERVED
8 IDLTIM_DSP
7 RESERVED
6 WKUP_MODE
5 IDLDPLL_DSP
4 IDLIF_DSP
3 RESERVED
2 IDLPER_DSP
SPRU749A
Base Address = 0xE100 8000 or 0x008000, Offset = 0x04
Function
Reading these bits gives undefined values. Writing to
them has no effect.
Selects the idle entry mode for the internal DSP timer
clock.
0: The DSPTIM_CK clock remains active when DSP
enters the idle mode.
1: The DSPTIM_CK clock is stopped in conjunction
with DSP clock when the idle mode is set.
This bit must be set to 0.
This bit has no effect in the OMAP 3.2 hardware
engine.
This bit has no effect in the OMAP 3.2 hardware
engine.
This bit has no effect in the OMAP 3.2 hardware
engine
This bit must be set to 0.
Selects idle entry mode for external peripheral clock.
0: The DSPPER_CK clock remains active when DSP
enters the idle mode.
1: The DSPPER_CK is stopped in conjunction with
DSP clock when the idle mode is set.
Clock Generation and Reset Management
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
OMAP3.2 Subsystem
Reset
0x00
0
0
1
0
0
0
0
157