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Table 42. DSP Boot Configuration
Relative Word
Address
Register Name
0x00000F
DSP_BOOT_CONFIG
9.4.1
Boot Modes
SPRU750A
facilitates downloading (bootloading) of DSP code into the DSP subsystem
internal memory from either the DSP EMIF interface to the traffic controller or
the MPUI interface when it is held in reset by the MPU. The boot mode used
by the DSP subsystem bootloader is specified by the MPU using the
DSP_BOOT_CONFIG register when it is released from reset by the MPU. This
register is read-only for the DSP and is mapped to address 0x000F in the DSP
I/O space (within the DSP TIPB address space). The register is read/write for
the MPU and appears at address 0xFFFE:C900 in the MPUI address space.
The MPU controls the boot process by programming bits BOOT_MOD[3:0]
while the DSP subsystem is held in reset state. Table 42 shows the DSP boot
configuration.
The DSP is reset by two signals:
-
nRESET is a global reset (active low) that resets the DSP subsystem
except for the TIPB interrupt priority encoder, the DSP EMIF configuration
registers, and the MPUI port control logic.
-
nMCURESET is a reset signal driven by the MPU (active low). It sets the
TIPB interrupt priority encoder registers, configures the DSP-EMIF
registers, and resets the MPUI control logic.
The MPU controls these reset signals by writing into the RSTCT1 clock and
reset module register.
There are five boot modes for the DSP subsystem. The MPU can select any
of these boot modes by writing to the DSP_BOOT_CONFIG register. When
the DSP subsystem is released from reset (boot), the CPU always fetches
instruction at address 0xFFFF00. The physical location of this address
depends on the value of the BOOT_MOD[3:0] bits.
If BOOT_MOD[3:0] is equal to 0000, the on-chip ROM is not available and the
boot address is located off-chip. If BOOT_MOD[3:0] is not equal to 0000, the
on-chip ROM is enabled and the boot address is located at the on-chip ROM.
The boot modes supported are listed in Table 43.
Bits
BOOT_MODE [3:0]
System Operating Details
Reset Value
Depends on external
implementation
DSP Subsystem
85
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