Texas Instruments OMAP5912 Reference Manual page 544

Ultralow-Power Device
Table 2. Initiators to Deep Sleep −> Big Sleep Transition (Continued)
CONF_MOD_MMC_SD2_CLK_REQ_R (register)
Clock request by USB
MCLKREQ
BCLKREQ
SOFT_REQ_REG (active)
DEEP_TRANSITION_ENABLE
Notes: 1) Software requests prevent the transition to deep sleep when leaving awake state but are not initiators of deep sleep
to big sleep transition.
2) DEEP_SLEEP_TRANSITION_EN is not an initiator of deep sleep to big sleep transition. It keeps FSM1 in big sleep
mode and prevents transition to deep sleep mode when leaving the awake state.
3) When in external 48-MHz clock mode (CONF_DPLL_EXT_SEL = 0), clock requests related to 48-MHz clock have
no effect on the FSM.
4) The USB can request clock when an external host or device is detected or when the USB enters the resume state.
5) Software requests for clock can be programmed in the ULPD SOFT_REQ_REG (see Table 20).
26 Power Management
Transition from Deep Sleep to Big Sleep
The transition sequence is as follows:
1) External clock request occurs.
2) LOW_PWR is asserted high.
3) Depending on the system input clock source mode:
a) External mode:
SETUP_ANALOG_CELL3, is loaded with the related setup value
from the ULPD register that corresponds to the ramp-up time of the
external voltage supply. When the counter underflow is generated, it
globally enables the system input clock to peripherals.
At this point it is possible that the external system input clock is not
present yet. The clocks for the peripherals are effectively restarted
whenever the system input clock arrives, if the corresponding clock
request is active.
This setup stage allows the supply voltage to be stable before enab-
ling the input clocks to peripherals.
MMC/SDIO2
USB OTG. See Note 4.
OMAP5912 input pin
OMAP5912 I/O input pin
Software requests. See Note 5.
Other
ULPD
In this case, the setup counter,
SPRU753A