Texas Instruments OMAP5912 Reference Manual page 843

Multimedia processor device overview and architecture
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Figure 11.
Single Page Read Host Mode
Reset
NND_ECC1,
NND_ECC2.
ECC 256
Reset
NND_ECC1,
NND_ECC2.
ECC 512
Note: In the case of ECC 256, the reading of ECC can also be performe d when the full page has been read.
SPRU756A
Interrupt to host to signal data ready to be read.
Software clears the interrupt.
Read data from flash and
accumulate ECC in
NND_ECC1.
The host can decide to
read the NND_ECC1.
Interrupt to host to signal data ready to be read.
Software clears the interrupt.
Read data from flash and
accumulate ECC in
NND_ECC1.
Read data from flash and
accumulate ECC in
NND_ECC2.
The host can decide to
read the NND_ECC2.
The host can decide to
read the NND_ECC1.
Memory Interfaces for the EMIFS
Flintn (interrupt)
Spare read with previous ECC.
ECC check done in software.
Flintn (interrupt)
Spare read with previous ECC.
ECC check done in software.
Memory Interfaces
37

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