Texas Instruments OMAP5912 Reference Manual page 200

Clock Generation and Reset Management
Table 62. MPU Registers
Name
ARM_CKCTL
ARM_IDLECT1
ARM_IDLECT2
ARM_EWUPCT
ARM_RSTCT1
ARM_RSTCT2
ARM_SYSST
ARM_CKOUT1
ARM_CKOUT2
ARM_IDLECT3
Table 63. MPU Clock Control Prescaler Selection Register (ARM_CKCTL)
Bit Name
31:15 RESERVED
14 ARM_INTHCK_SEL This bit controls which clock is used for the
13 EN_DSPCK
12 ARM_TIMXO
For reserved bits, reading gives undefined values. Writing to has no effect.
Note:
142 OMAP3.2 Subsystem
Base Address = 0xFFFE CE00
Description
MPU clock control prescaler selection
MPU idle enable control 1
MPU idle enable control 2
MPU restore power delay
Master software reset
Peripherals reset
MPU clock reset status
MPU clock out definition
MPU reserved
MPU idle enable control 3
Base Address = 0xFFFE CE00, Offset = 0x00
Function
See note.
ARM_INTH_CK
0: ARM_INTH_CK clock is same as ARM_CK (default).
1: ARM_INTH_CK is half frequency of ARM_CK.
Turns on DSP_CK while the DSP is still in reset state.
0: Disables DSP_CK activation during the reset state.
1: Enables DSP_CK activation during the reset state.
Selects a subfrequency issued either from CK_GEN1 or
from input reference clock (CK_REF) to supply internal
MPU timers.
0: ARMTIM_CK clock frequency is the input reference
clock (CK_REF).
1: ARMTIM_CK clock frequency is issued from CK_GEN1.
R/W Offset
R/W 0x00
R/W 0x04
R/W 0x08
R/W 0x0C
R/W 0x10
R/W 0x14
R/W 0x18
R/W 0x1C
R/W 0x20
R/W 0x24
R/W Reset
R/W 0x0000
R/W 0
R/W 1
R/W 1
SPRU749A