Texas Instruments OMAP5912 Reference Manual page 260

TIPB Bridge
Table 124. Debug Data MSB Register (DEBUG_DATA_MSB)
Base Address = 0xFFFE D300 (Public), 0xFFFE CA00 (Private), Offset = 0x18
Bit Name
15:0 DATA_DBG_HIGH
Table 125. Debug Control Signals Register (DEBUG_CTRL_SIGNALS)
Base Address = 0xFFFE D300 (Public), 0xFFFE CA00 (Private), Offset = 0x1C
Bit Name
15:11 Reserved
10:9 HOST_ID
8 BURST_ACC
7:6 DBG_PERHMAS(1:0)
5:4 DBG_MAS(1:0)
202 OMAP3.2 Subsystem
Function
Bits 31 to 16 of data bus from MPU. The value of the
MPU data input bus is saved when a read access has a
size mismatch, and the MPU data output bus is saved
when a write access is aborted or has a size mismatch.
If a read access is aborted, the value of this register is
irrelevant.
Function
Host-ID that caused the abort
00: MPU
01: DMA
10: OCP-I
11: Invalid
Indicates single or burst access on the TIPB;
saved when abort or access size mismatch
occurs.
0: Single access
1: Burst access
Peripheral memory access size on TIPB; saved
when abort or access size mismatch occurs.
00: 8 bits
01: 16 bits
1x: 32 bits
Memory access size on TIPB; saved when abort
or access size mismatch occurs.
00: 8 bits
01: 16 bits
1x: 32 bits
R/W Reset
R 0xFFFF
R/W Reset
R/W 0x00
R 00
R 0
R 11
R 11
SPRU749A