Texas Instruments OMAP5912 Reference Manual page 777

Multimedia processor device overview and architecture

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Table of Contents

Table 107. DMA Controller Configuration Registers (Continued)

Channel 4 (Continued)

Channel 4 source frame index

Channel 4 source element index

Channel 4 source address counter

Channel 4 destination address counter

Channel 4 destination element index

Channel 4 destination frame index

Channel 5 source destination parameters

Channel 5 control

Channel 5 interrupt control

Channel 5 status

Channel 5 source start address, lower bits

Channel 5 source start address, upper bits

Channel 5 destination start address, lower bits

Channel 5 destination start address, upper bits

Channel 5 element number

Channel 5 frame number

Channel 5 frame index

Channel 5 element index

Channel 5 source address counter

Channel 5 destination address counter

Channel 5 destination element index

Channel 5 destination frame index

Direct Memory Access (DMA) Support

Word Address

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