Texas Instruments OMAP5912 Reference Manual page 572

Ultralow-Power Device
Table 15. Reserved Register (RESERVED)
Bit Name
15:0 RESERVED
Table 16. Setup Analog Cell3 ULPD1 Register (SETUP_ANALOG_CELL3_REG)
Bit Name
15:0 SETUP_ANALOG_CELL3
Note: This setup stage is for the FSM1 of the ULPD.
Table 17. Setup Analog Cell2 ULPD1 Register (SETUP_ANALOG_CELL2_REG)
Bit Name
15:0 SETUP_ANALOG_CELL2
Note: This setup stage is for the FSM1 of the ULPD.
Table 18. Setup Analog Cell1 ULPD1 Register (SETUP_ANALOG_CELL1_REG)
Bit Name
15:0 SETUP_ANALOG_CELL1
Note: This setup stage is for the FSM1 of the ULPD.
Table 19. Clock Control Register (CLOCK_CTRL_REG)
Bit Name
15:7 UNUSED
6 SLICER_BYPASS
5 DIS_USB_PVCI_CLK
4 USB_MCLK_EN
54 Power Management
Base Address = 0xFFFE 0800, ?Offset = 0x1C
Function
Reserved
Base Address = 0xFFFE 0800, Offset = 0x24
Function
Setup time of analog cell3 in number of
sleep clock cycles
Base Address = 0xFFFE 0800, Offset = 0x28
Function
Setup time of analog cell2 in number of
sleep clock cycles
Base Address = 0xFFFE 0800, Offset = 0x2C
Function
Setup time of analog cell1 in number of
sleep clock cycles
Base Address = 0xFFFE 0800, Offset = 0x30
Function
Unused
Reserved
1: Disable USB W2FC PVCI clock.
0: Enable.
0: Disable USB hub clock output.
1: Enable.
R/W Reset
R/W 0x3FF
R/W Reset
R/W 0x3FF
R/W Reset
R/W 0x0
R/W Reset
R/W 0x0
R/W Reset
R/W 0x0
R/W 0x0
R/W 0x0
R/W 0x0
SPRU753A