Texas Instruments OMAP5912 Reference Manual page 261

Table 125. Debug Control Signals Register (DEBUG_CTRL_SIGNALS) (Continued)
Base Address = 0xFFFE D300 (Public), 0xFFFE CA00 (Private), Offset = 0x1C
Bit Name
3 DBG_NSUPV
2 DBG_RNW
1 WR_SIZE_FLAG
0 ABORT_FLAG
Table 126. Access Control Register (ACCESS_CNTL)
Base Address = 0xFFFE D300 (Public), 0xFFFE CA00 (Private), Offset = 0x20
Bit Name
15:4 Reserved
3 DPS_EN
2 MASK_OCPI
NABORT
SPRU749A
Function
Indicates supervisor mode status of MPU;
saved when abort or access size mismatch
occurs.
0: Processor in supervisor mode
1: Processor not in supervisor mode
Indicates read or write transaction on the TIPB;
saved when abort or access size mismatch
occurs.
0: Write transaction
1: Read transaction
Flag set to 1 when there is a mismatch between
memory access size and peripheral memory
access size. When read, the bit is reset to 0.
Flag set to 1 when TIPB access is aborted.
When read, the bit is reset to 0.
Function
0: Dynamic power-saving mode is disabled.
1: Dynamic power-saving mode is enabled.
When DPS is enabled, the bridge clock is turned.
1: The abort for DMA access is masked before
sending back to the DMA.
0: The abort for DMA access is sent back to the DMA.
1: The abort for OCPI access is masked before
sending back to the OCPI.
TIPB Bridge
R/W Reset
R
R
R
R
R/W Reset
R/W 0x000
R/W
R/W
OMAP3.2 Subsystem
1
1
0
0
0
0
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