Texas Instruments OMAP5912 Reference Manual page 201

Table 63. MPU Clock Control Prescaler Selection Register (ARM_CKCTL)
(Continued)
Bit Name
11:10 DSPMMUDIV
9:8 TCDIV
7:6 DSPDIV
5:4 ARMDIV
For reserved bits, reading gives undefined values. Writing to has no effect.
Note:
SPRU749A
Base Address = 0xFFFE CE00, Offset = 0x00
Function
Define prescaler value from the frequency of CK_GEN2 to
DSPMMU clock domain.
00: CK_GEN2
01: CK_GEN2/2
10: CK_GEN2/4
11: CK_GEN2/8
Define prescaler value from the frequency of CK_GEN3 to
TC clock domain.
00: CK_GEN3
01: CK_GEN3/2
10: CK_GEN3/4
11: CK_GEN3/8
Define the prescaler value from the frequency of
CK_GEN2 to DSP clock domain.
00: CK_GEN2
01: CK_GEN2/2
10: CK_GEN2/4
11: CK_GEN2/8
Define the prescaler from the frequency of CK_GEN1 to
MPU clock domain.
00: CK_GEN1
01: CK_GEN1/2
10: CK_GEN1/4
11: CK_GEN1/8
Clock Generation and Reset Management
OMAP3.2 Subsystem
R/W Reset
R/W 00
R/W 00
R/W 00
R/W 00
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