Texas Instruments OMAP5912 Reference Manual page 1065

Multimedia processor device overview and architecture
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Index
N
notational conventions 3
O
OMAP3.2 OS timer 21
DSP 32-bit timers 25
DSP/MPU 22
DSP/MPU input clocks 22
DSP/MPU start and stop 21
interrupts 23
MPU 32-bit timers 28
programming 25
reading timer values 22
registers 25
OMAP5912 OS timer 55
countdown operation 55
interrupt period 56
loading/autorestart 56
overriding normal counting 56
peripheral alignment/data width 57
registers 57
OMAP5912 OS timer registers, OMAP5912 57
OS Timer interrupt period, OMAP5912 56
OS timer registers, OMAP3.2 25
Overflow/reset generation, 32-bit
watchdog timer 11
Overriding normal counting, OMAP5912
OS timer 56
P
Peripheral alignment, OMAP5912 OS timer 57
Posted/nonposted writes, 32-bit watchdog timer 10
Prescaler functionality, dual-mode timer 34
Prescaler value, 32-bit watchdog timer 12
62
Index
Programming, OMAP3.2 OS timer 25
Programming registers, dual-mode timer 39
Pulse-width modulation, dual-mode timer 35
R
Reading OS timer values, OMAP3.2 OS timer 22
Reading registers, dual-mode timer 39
Registers
32-kHz synchronized timer 53
dual-mode timer 42
OMAP3.2 OS timer 25
related documentation from Texas Instruments 3
Reset context, 32-bit watchdog timer 11
S
Sleep mode request/acknowledge,
dual-mode timer 37
Start/stop, 32-bit watchdog timer 13
T
Timer counting rate, dual-mode timer 38
Timer interrupts, OMAP3.2 OS timer 23
Timer reset frequency, 32-bit watchdog timer 12
Timer under emulation, dual-mode timer 39
trademarks 3
Triggering new reload, 32-bit watchdog timer 11
W
Watchdog module under emulation, 32-bit
watchdog timer 14
WCRR access restriction, 32-bit
watchdog timer 13
Writing registers, dual-mode timer 40
SPRU759B

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