Texas Instruments OMAP5912 Reference Manual page 776

Multimedia processor device overview and architecture

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Table 107. DMA Controller Configuration Registers (Continued)

Direct Memory Access (DMA) Support

Channel 3 (Continued)

Channel 3 interrupt control

Channel 3 status

Channel 3 source start address, lower bits

Channel 3 source start address, upper bits

Channel 3 destination start address, lower bits

Channel 3 destination start address, upper bits

Channel 3 element number

Channel 3 frame number

Channel 3 source frame index

Channel 3 source element index

Channel 3 source address counter

Channel 3 destination address counter

Channel 3 destination element index

Channel 3 destination frame index

Channel 4 source destination parameters

Channel 4 control

Channel 4 interrupt control

Channel 4 status

Channel 4 source start address, lower bits

Channel 4 source start address, upper bits

Channel 4 destination start address, lower bits

Channel 4 destination start address, upper bits

Channel 4 element number

Channel 4 frame number

Word Address

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