Texas Instruments OMAP5912 Reference Manual page 990

Multimedia processor device overview and architecture
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Figure 9.
OCP Interconnect
OCP_T (1x slave
interface)
(address space
decoding interface)
OCP_T (1x address
space decoding)
(error reporting
interface)
OCP_T2 (1x
master interface)
SPRU758A
All interfaces are 32-bit data width and support burst and nonburst operations.
Because the OMAP OCP_I port does not support split bursts, the buffer block
translates split burst (master can insert wait states between valid commands
during burst) into a simple burst action (the master cannot insert wait states
between valid commands during burst).
The OCP arbiter interconnect also provides address space decoding and
standard OCP error signaling if the address is out of GDD/SSI or VLYNQ
address space.
GDD or VLYNQ
OCP_I (1x master
interface)
OCP_I (1x slave
interface)
Arbiter block
OCP
interconnect
arbiter
OMAP
USB_OTG
OCP_I (1/2x master
OCP_I (1/2x slave
Mux
Buffer block
OCP_I (1x master
interface)
OCP_I (1x slave
interface)
Peripheral Interconnects
OCP Interconnect
interface)
interface)
Buffer control
Configuration
interface
SCAN
interface
Config
SCAN
39

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