Texas Instruments OMAP5912 Reference Manual page 741

Table 81. DMA LCD Bottom Address B1 U Register (BOT_B1_U)
Bit Name
15:0
DMA LCD Top Address B2 Registers
Table 82. DMA LCD Top Address B2 L Register (TOP_B2_L)
Bit Name
15:1
0
Table 83. DMA LCD Top Address B2 U Register (TOP_B2_U)
Bit Name
15:0
DMA LCD Bottom Address B2 Registers
SPRU755B
Base Address = 0xFFFE E300, Offset Address = 0xCE
Function
LCD BOT address for block buffer 1 upper bits
The LCD top address B2 registers are two 16-bit registers that contain the start
address for the video RAM buffer 2. The 32-bit address is obtained by the
concatenation of the two word16 as described here:
LCD_TOP_B2 = DMA_LCD_TOP_B2_U & DMA_LCD_TOP_B2_L
Note:
The LSB of the word32 is equal to zero. Address of video buffer must always
be even.
Base Address = 0xFFFE E300, Offset Address = 0xD0
Function
LCD TOP address for block buffer 2 lower bits
0 (always tied to 0)
Base Address = 0xFFFE E300, Offset Address = 0xD2
Function
LCD TOP address for block buffer 2 upper bits
The LCD bottom B2 address registers are two 16-bit registers that contain the
bottom address for the video RAM buffer 2. The 32-bit address is obtained by
the concatenation of the two word16 as described here:
LCD_BOTTOM_B2 = DMA_LCD_BOT_B2_U & DMA_LCD_BOT_B2_L
Direct Memory Access (DMA) Support
System DMA
R/W Reset
R/W ND
R/W Reset
R/W ND
R 0
R/W Reset
R/W ND
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