Texas Instruments OMAP5912 Reference Manual page 1002

Multimedia processor device overview and architecture
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Numbers
1/2x OCP slave port 40
1x OCP master port 41
1x OCP slave port 40
A
Abort transaction, layer 4 interconnect 29
Address space, OCP interconnect 41
Arbiter block, OCP interconnect 41
B
Buffer block, OCP interconnect 41
C
Clock and reset, SSI interconnect 45
D
Decode, SSI interconnect 44
DMA and interrupt formatter 44
Dynamic switch, layer 4 interconnect 24
F
Functional description, layer 4 interconnect 24
SPRU758A
I
Introduction
OCP 38
SSI interconnect 42
L
Layer 4 interconnect
abort transaction 29
dynamic switch 24
functional description 24
peripheral instantiation 35
protocols 23
static switch 27
TIPB router 34
TIPB router connections 22
TIPB−OCP/OCP−TIPB wrapper 32
TIPB−OCP/OCP−TIPB wrapper for
USBOTG 33
TIPB1−VIA/VIA−TIPB wrapper 32
M
Module features, OCP interconnect 40
O
OCP interconnect 37
1/2x OCP slave port 40
1x OCP master port 41
1x OCP slave port 40
address space 41
arbiter block 41
buffer block 41
introduction 38
module features 40
OCP to VIA asynchronous bridge 43
Index
Index
Index
51

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