Texas Instruments OMAP5912 Reference Manual page 1064

32-bit watchdog timer 9
accessing watchdog registers 13
global OCP registers 14
modify WCRR, WLDR, and prescaler ratios 13
overflow/reset generation 11
posted/nonposted writes 10
prescaler value/timer reset frequency 12
reset context 11
start/stop 13
triggering new reload 11
watchdog module under emulation 14
WCRR access restriction 13
32-kHz synchronized timer 52
functional description 52
registers 53
32-kHz watchdog timer 20
A
Accessing registers, dual-mode timer 39
Accessing watchdog registers, 32-bit
watchdog timer 13
C
Capture mode functionality, dual-mode timer 34
Compare mode functionality, dual-mode timer 34
Countdown operation, OMAP5912 OS timer 55
D
Data, width, OMAP5912 OS timer 57
Description, dual-mode timer 32
DSP 32-bit timers, OMAP3.2 OS timer 25
DSP/MPU input clocks, OMAP3.2 OS timer 22
DSP/MPU start/stop, OMAP3.2 OS timer 21
DSP/MPU timer, OMAP3.2 OS timer 22
Dual-mode timer 30
accessing registers 39
SPRU759B
capture mode functionality 34
compare mode functionality 34
counting rate 38
description 32
implementation 51
interrupt control 36
mode functionality 33
prescaler functionality 34
programming registers 39
pulse-width modulation 35
reading registers 39
registers 42
sleep mode request/acknowledge 37
timer under emulation 39
writing registers 40
F
Functional description, 32-kHz
synchronized timer 52
G
Global OCP registers, 32-bit watchdog timer 14
I
Implementation, dual-mode timer 51
Interrupt control, dual-mode timer 36
L
Loading/autorestart, OMAP5912 OS timer 56
M
Mode functionality, dual-mode timer 33
Modifying WCRR, WLDR, and prescaler ratios,
32-bit watchdog timer 13
MPU 32-bit timers, OMAP3.2 OS timer 28
Index
Index
Index 61