Texas Instruments OMAP5912 Reference Manual page 597

Multimedia processor device overview and architecture
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Table 46. TIPB Control Mode Register (CMR)
MPU Base Address (byte) = 0xE100 0000, DSP Base Address (word) = 0x00 0000, Offset = 0x00 (word)
Bit
Name
[15−9]
Timeout(6:0)
[8]
Wait State 3
(strobe 1)
[7]
Wait State 2
(strobe 1)
[6]
Wait state1
(strobe 1)
[5]
Wait state 3
(strobe 0)
[4]
Wait state 2
(strobe 0)
[3]
Wait state 1
(strobe 0)
[2]
First priority
[1]
Bus error
[0]
Mode
Table 47. Wait State Strobe Frequency NIL
SPRU753A
Description
Strobe cycles
Strobe 1 length (high bit)
Strobe 1 length (medium
bit)
Strobe 1 length (low bit)
Strobe 0 length (high bit)
Strobe 0 length (medium
bit)
Strobe 0 length (low bit)
Priority modes
Application flag error
SAM or HOM
The strobe frequency can go from 1/2x to 1/9x of the DSP clock frequency.
Number of
Wait States
Strobe Period
0
DSP clk/2
1
DSP clk/3
2
DSP clk/4
3
DSP clk/5
4
DSP clk/6
5
DSP clk/7
6
DSP clk/8
7
DSP clk/9
Power Management User Services
Reset
CPU Access
0x7F
Read/Write
0
Read/Write
0
Read/Write
1
Read/Write
0
Read/Write
0
Read/Write
1
Read/Write
1
Read/Write
0
Read/Clear
1 (HOM)
Read
DSP Max Frequency
(MHz)
200
200
200
200
200
200
200
200
Power Management
MPU Access
Read
Read
Read
Read
Read
Read
Read
Read
Read(0 in HOM)
Read
Strobe Frequency
(MHz)
100
66
50
40
33
28
25
22
79

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