Texas Instruments OMAP5912 Reference Manual page 842

Multimedia processor device overview and architecture
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Memory Interfaces for the EMIFS
Figure 10.
ECC Pointer Management
NND_ECC_SELECT = others
NND_ECC_SELECT = 0x5
NND_ECC_SELECT = 0x4
NND_ECC_SELECT = 0x3
36
Memory Interfaces
9
8
7
6
X
The pointer transition from one state to another is made after either 256 or 512
data has been read (control bit ECC_256 in the NND_STATUS register). After
a reset (RESETN going low, soft reset, or writing 1 to bit 0 of NND_RESET),
the pointer is set to NND_ECC1 register.
1
5
NND_ECC_SELECT = 0x2
Pointer on the
NN D_ECCx register.
1 in bit 0 of
NND_RESET
RESET
2
3
4
NND_ECC_SELECT = 0x1
SPRU756A

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