Texas Instruments OMAP5912 Reference Manual page 692

System DMA
3.2.2 LCD Channel Addressing Modes
68 Direct Memory Access (DMA) Support
Separate element/frame index and number of elements between the two
buffers are also supported in the dual-block mode.
The LCD channel sends the read request to the relevant port, defined by the
lcd_source_port bit in the DMA LCD control register (DMA_LCD CTRL) just
as the destination port is selected by the lcd_destination_port in the same
register. The destination port can be either the OMAP internal LCD controller
or the external LCD controller port.
The dedicated DMA channel contains a FIFO used as an elastic buffer to
prevent underflow or overrun to/of the LCD.
Hardware ignores the bottom address register of blocks for dual- and
single-block access mode. Each block size is defined by
Block_Size = ES x EN x FN in bytes
where:
ES = Element Size: number of bytes within an element. Bit-field data_type
is configured in register DMA LCD channel source destination parameters
(DMA_LCD_CSDP).
EN = Element number (within one frame).
FN = Frame number.
In order to support graphic functionality, this DMA LCD channel also supports
rotation capability at 0°, 90°, 180°, and 270°, by utilizing its source double
index mode.
Post-incremented, single-indexed (element index), and double indexed
(element and frame indexes) addressing modes are supported from the
source port side. However, note that there is no write address to compute in
the destination for the display channel. The read FIFO address is controlled
by the LCD controller, so there is no write address to a port.
SPRU755B