Texas Instruments OMAP5912 Reference Manual page 503

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

Configuration
Table 48. Module Configuration Control 1 Register (MOD_CONF_CTRL_1)
(Continued)
Bit
Name
5:4
CONF_MOD_GPTIMER3_
CLK_SEL_R
3:2
CONF_MOD_GPTIMER2_
CLK_SEL_R
1:0
CONF_MOD_GPTIMER1_
CLK_SEL_R
Table 49. GZ and PWRDN Bits in MOD_CONF_CTRL_1
CONF_OSC1_GZ_R
0
0
1
In reset mode 1, the PWRDN bit is forced to 1.
86
Initialization
Base Address = 0xFFFE 1000, Offset Address = 0x110
Function
This register selects the clock source for
general-purpose timer 3.
00 = ARMXOR_CLK
01 = 32-kHz clock
10 = EXT_CLK of the device external timer
clock
11 = Reserved; do not use
This register selects the clock source for
general-purpose timer 2.
00 = ARMXOR_CLK
01 = 32-kHz clock
10 = EXT_CLK of the device external timer
clock
11 = Reserved; do not use
This register selects the clock source for
general-purpose timer 1.
00 = ARMXOR_CLK
01 = 32-kHz clock
10 = EXT_CLK of the device external timer
clock
11 = Reserved; do not use
This register controls the module configuration of the device.
CONF_OSC1_PWRDN_R
0
1
X
Comments
Normal operating mode w/internal bias resistor.
Normal operating mode w/disconnected internal bias
resistor. Enables the use of an external square
clock.
Oscillator disabled.
R/W
Reset
R/W
0x0
R/W
0x0
R/W
0x0
SPRU752B

Advertisement

Table of Contents
loading

Table of Contents