Texas Instruments OMAP5912 Reference Manual page 878

Software NAND Flash Controller
2.2.3 Write Data Sequence Example
Figure 20. NAND Flash Write Sequence
NAND flash
Nor flash
SRAM
SDRAM
72 Memory Interfaces
-
Use a NAND flash device that is NAND CE Don't Care. Be careful to
purchase an appropriate NAND flash device (most of the NAND flash
devices manufactured are NAND CE Don't Care-compliant).
The high-level sequence of operations that is needed to write data to the
NAND flash device is shown in Figure 20. The assumption is that the source
data to be written to the NAND flash device resides in external SDRAM
memory, but this is not a requirement. The source data can reside in any
memory space available in the system. The MPU is the processor controlling
the write operations.
Step 2
EMIFS
Traffic
controller
EMIFF
Step 3
Step 2
MPU subsystem
System DMA
Step 1
DSP subsystem
OMAP3.2
OMAP5912
NAND
flash
controller
ECC
SPRU756A