Texas Instruments OMAP5912 Reference Manual page 218

Clock Generation and Reset Management
Table 79. DSP Peripherals Reset Register (DSP_RSTCT2)
Bit Name
15:2 RESERVED
1 WD_PER_EN
0 PER_EN
160 OMAP3.2 Subsystem
Base Address = 0xE100 8000 or 0x008000, Offset = 0x14
Function
Reading these bits gives undefined values. Writing to
them has no effect.
Controls the WD_DSPPER_nRST output, which can
be used to reset the external peripherals connected
to DSP. This WD_DSPPER_nRST pin is also reset
by an event on the DSP watchdog timer.
0: Sets WD_DSPPER_nRST pin to a low-level output
voltage.
1: Sets WD_DSPPER_nRST pin to a high-level
output voltage.
Controls the DSPPER_nRST output, which can be
used to reset the external peripherals connected to
DSP TIPB.
0: Sets DSPPER_nRST pin to a low-level output
voltage.
1: Sets DSPPER_nRST pin to a high-level output
voltage.
R/W Reset
R/W 0x0000
R/W 0
R/W 0
SPRU749A