Texas Instruments OMAP5912 Reference Manual page 623

Multimedia processor device overview and architecture
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Numbers
3.2 embedded LDO 46
3.2 reset generation 45
32−kHz oscillator calibration 49
A
APLL control 47
Autogating, MGS3/DSP 84
B
Bad ULPD devices 49
Battery failed interrupt 47
C
Clock domains 70
D
DPLL[3] control 46
Dynamic power management 83
Dynamic voltage scaling 93
low voltage with chip running 95
low voltage with chip shut down 93
L
Leakage current management 21
Low voltage operation 22
Low voltage with chip down 93
Low voltage with chip running 95
SPRU753A
P
Power domain management 90
Power domains 67
Power management
dynamic voltage scaling 93
power management software user guide 103
power management user services 72
power modes 95
power system overview 67
ULPD 15
Power management software guide 103
Power management user services 72
dynamic management 83
power domain management 90
power services 72
static clock management 72
ULPD power modes management 85
Power mode transitions 97
Power modes 95
transitions 97
Power services 72
Power system overview 67
clock domain 70
power domains 67
Poweron transition to deep sleep mode 25
Powerup and reset management 42
R
Reduced clock frequency 22
S
Static clock management 72
Index
Index
OMAP5912
105

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