Texas Instruments OMAP5912 Reference Manual page 964

1 Shared Peripherals
SPRU758A
This document describes various peripheral interconnects of the OMAP5912
multimedia processor.
Outside OMAP 3.2, the OMAP5912 includes several peripherals. They can be
considered shared by the MPU and the DSP, or can be DSP or MPU private.
Privacy is mainly driven by the performance requested by the peripheral.
OMAP provides four peripheral buses:
-
16-bit data bus DSP private
-
16-bit data bus DSP shared
-
32-bit data bus MPU private
-
32-bit data bus MPU shared
OMAP supports one bus protocol: the TIPB protocol.
The TIPB protocol enables unidirectional asynchronous transfer from or to
peripherals to or from CPUs/DMAs.
Both shared buses ((MPU + system DMA) and (DSP + DSPDMA)) are
multiplexed in the L4 interface either dynamically or semistatically to
communicate with all the shared peripherals.
The L4 interface groups a set of wrappers (or protocol converter), a dynamic
switch, and a static switch. They enable interface with all the peripherals,
regardless of their interface protocol with the MPU and DSP peripheral buses.
The DSP peripherals are also accessible from the MPU via the DSP MPUI port
(see Figure 1).
Peripheral Interconnects
Peripheral Interconnects 13