Texas Instruments OMAP5912 Reference Manual page 525

SPRU753A
terface of the OMAP5912 multimedia processor. There are four GPIO
modules in the OMAP5912. Each GPIO peripheral controls 16 dedicated
pins configurable either as input or output for general purposes. Each pin
has an independent control direction set by a programmable register.
The two−edge control registers configure events (rising edge, falling
edge, or both edges) on an input pin to trigger interrupts or wake−up re-
quests (depending on the system mode). In addition, an interrupt mask
register masks out specified pins. Finally, the GPIO peripherals provide
the set and clear capabilities on the data output registers and the inter-
rupt mask registers. After detection, all event sources are merged and
a single synchronous interrupt (per module) is generated in active mode,
whereas a unique wake−up line is issued in idle mode. Eight data output
lines of the GPIO3 are ORed together to generate a global output line at
the OMAP5912 boundary. This global output line can be used in conjunc-
tion with the SSI to provide a CMT−APE interface to the OMAP5912.
OMAP5912 Multimedia Processor VLYNQ Serial Communications Inter-
face Reference Guide (literature number SPRU768) describes the
VLYNQ of the OMAP5912 multimedia processor.
VLYNQ is a serial communications interface that enables the extension
of an internal bus segment to one or more external physical devices. The
external devices are mapped into local, physical address space and ap-
pear as if they are on the internal bus of the OMAP 5912. The external
devices must also have a VLYNQ interface. The VLYNQ module serial-
izes bus transactions in one device, transfers the serialized data be-
tween devices via a VLYNQ port, and de-serializes the transaction in the
external device.
OMAP5912 includes one VLYNQ module connected on OCPT2 target
port and OCPI initiator port. These connections are configured via a stat-
ic switch, which selects either SSI or VLYNQ module. This switch, for-
bids the simultaneous use of GDD/SSI and VLYNQ. The switch is con-
trolled by the VLYNQ_EN bit in the OMAP5912 configuration control reg-
ister (CONF_5912_CTRL).
OMAP5912 Multimedia Processor Pinout Reference Guide (literature
number SPRU769) provides the pinout of the OMAP5912 multimedia
processor. After power-up reset, the user can change the configuration
of the default interfaces. If another interface is available on top of the de-
fault, it is possible to enable a new interface for each ball by setting the
corresponding 3-bit field of the associated FUNC_MUX_CTRL register.
It is also possible to configure on-chip pullup/pulldown. This document
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OMAP5912 7