Texas Instruments OMAP5912 Reference Manual page 778

DSP DMA
Table 108. Global Control Register (DMA_GCR)
Bit Name
31:4 Reserved
3 AUTOGATING_ON
2 FREE
1 MPUI_EXCL
0 MPUI_PRIO
154 Direct Memory Access (DMA) Support
Function
DMA autoidle bit. Controls whether DMA circuits
are automatically idled when DMA is inactive.
0: DMA clocks are free running.
1: Allows the DMA clocks to autoidle when
inactive.
Emulation mode bit FREE controls the behavior of
the DMA controller when an emulation breakpoint
is encountered.
0: A breakpoint suspends DMA transfers.
1: DMA transfers continue uninterrupted on a
breakpoint.
MPUI exclusive access bit. MPUI_EXCL
determines whether the MPUI has exclusive
access to the internal SARAM and DARAM of the
DSP subsystem.
0: MPUI shares DARAM and SARAM ports with
other DMA. In this mode, the MPUI can access all
internal memory, external memory, or peripherals.
1: MPUI channel has exclusive access to internal
RAM. If any other DMA channel attempts to
access the DARAM or the SARAM port, activity in
that channel suspends. In this configuration, the
MPUI can access only the DARAM port and
SARAM port. It cannot access the external
memory port.
Note: When MPUI has exclusive access to the
DARAM and SARAM ports (MPUI_EXCL
=1), the MPUI priority is irrelevant at these
ports because none of the DMA channels
can access the DARAM and SARAM ports.
MPUI priority bit. Assigns the MPUI a high or low
priority in the service chain of the DMA controller.
0: MPUI channel has low priority.
1: MPUI channel has high priority.
Type Reset
RW 1
RW 0
RW 0
RW 0
SPRU755B