OMAP3.2 Operating System Timer
Table 16. Valid Prescaler Values for OS Timer Configuration
T
DSP_interrupt
T
MPU_interrupt
Table 17. Example MPU OS Timer Interrupt Periods
24
Timers
PTV Bit Field in DSP
and MPU OS Timer
Control Register
The following equations are used to determine the timer interrupt periods.
For the DSP OS timer:
-
+ T
DSP_ref_clk
For the MPU OS timer
-
+ T
MPU_ref_clk
Where T
and T
DSP_ref_clk
timer input clocks.
Based on these equations, examples for various MPU OS timer interrupt
periods are calculated in Table 17 for a hypothetical MPU OS timer input clock
reference frequency of 100 MHz (T
MPU_LOAD_TIMER
0x0 (granularity)
0xFFFFFFFF(max period)
Input Clock Divisor
000
001
010
011
100
101
110
111
( t DSP_LOAD_TIMER_HI, LO u ) 1 )
( t MPU_LOAD_TIMER u ) 1 )
are clock periods of the DSP and MPU OS
MPU_ref_clk
MPU_ref_clk
PTV = 000
20 ns
85.9 s
2
4
8
16
32
64
128
256
(PTV)1)
2
(PTV)1)
2
= 10 ns).
PTV = 111
2.56 µs
10995 s (3 hr 3 min 15 s)
SPRU759B