Texas Instruments OMAP5912 Reference Manual page 779

Multimedia processor device overview and architecture
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Table 109. Global Time-Out Control Register (DMA_GTCR)
Bit
Name
31:2
NC
1
DARAM_TE
0
SARAM_TE
Table 110. Global Software Incompatible Control Register (DMA_GSCR)
Bit
Name
31:1
NC
0
DMA_ENHANCED_
INDEXING
SPRU755B
Function
DARAM time-out enable
0: DARAM port time-out counter is disabled.
1: DARAM port time-out counter is enabled.
SARAM time-out enable
0: SARAM port time-out counter is disabled.
1: SARAM port time-out counter is enabled.
Function
DMA destination indexing enhancement:
Software-incompatible control.
0: Destination element index = DMA_CSEI
register, destination frame index = DMA_CSFI
register
This mode permits software compatibility with
previous versions of the DMA controller hardware.
The source indexing registers are also used for
destination indexing. This is the power1-up default
state.
1: Destination element index = DMA_CDEI
register, destination frame index = DMA_CDFI
register
This mode of operation has separate destination
element and frame indexes, which are configured
by the channel-destination element index and the
channel-destination frame index, respectively.
Direct Memory Access (DMA) Support
DSP DMA
Type
Reset
RW
0
RW
0
Type
Reset
RW
0
155

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