Texas Instruments OMAP5912 Reference Manual page 580

Multimedia processor device overview and architecture
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Ultralow-Power Device
Table 32. Setup Analog Cell6 ULPD1 Register (SETUP_ANALOG_CELL6_REG)
Bit
Name
15:0
SETUP_ANALOG_CELL6
Note:
This setup stage is for the FSM1 of the ULPD.
Table 33. Software Disable Request Register (SOFT_DISABLE_REQ_REG)
Bit
Name
15
UNUSED
14
DIS_CLOCK3_DPLL_REQ
13
DIS_CLOCK2_DPLL_REQ
12
DIS_CLOCK1_DPLL_REQ
11
DIS_MMC2_DPLL_REQ
10
DIS_MMC_DPLL_REQ
9
DIS_UART3_DPLL_REQ
8
DIS_UART2_DPLL_REQ
62
Power Management
Base Address = 0xFFFE 0800, Offset = 0x64
Function
Setup time of analog cell6 in number of
sleep clock cycles
Base Address =0xFFFE 0800, Offset = 0x68
Function
Unused
Disable for the PLL hardware request
reserved (CLOCK3_DPLL_REQ).
0: Not disabled
1: Disabled
Disable for the PLL hardware request
reserved (CLOCK2_DPLL_REQ).
0: Not disabled
1: Disabled
Disable for the PLL hardware request
reserved (CLOCK1_DPLL_REQ).
0: Not disabled
1: Disabled
Disable for hardware request
MMC2_DPLL_REQ.
0: Not disabled
1: Disabled
Disable the current hardware request if
active
0: Not disabled
1: Disabled
Disable hardware request for UART3.
0: Not disabled
1: Disabled
Disable UART2 PLL hardware request.
0: Not disabled
1: Disabled
R/W
Reset
R/W
0x0
R/W
Reset
R
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
SPRU753A

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