Texas Instruments OMAP5912 Reference Manual page 405

Multimedia processor device overview and architecture
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OMAP5912 Clock Architecture
Table 12. Peripheral Clocks and Associated Controls (Continued)
Peripheral Name
MMC/SDIO1
FAC
MPUIO
DSP interrupt
handler 2.1
McBSP1
McBSP3
MCSI1
MCSI2
SoSSI
Notes:
1) The GPIO functional clock is controlled by CAM_CLK_CTRL[2]. If CAM_CLK_CTRL[2] is set , the GPIO function-
al clock is idle.
2) The SoSSI functional clock can be divided further from 1 to 8 by setting CONF_MODE_CLK_SEL[19:17].
50
Clocks
Functional Clock
Domain
48 MHz from ULPD
ARMXOR_CK (gated
in ULPD)
32 kHz from ULPD
DSPPER_CK
MCBS1_CLKS
CK_DPLL1OUT
DSPXOR_CK
MCSI1_BCLK
MCSI2_CLK
CK_DPLL1OUT
Interface Clock
MOD_CONF_
CTRL_0
(OMAP5912 Con-
figuration)
ARMPER_CK
Not applicable
DSPPER_CK
DSPPER_CK
CONF_MOD_
MCBSP1_CLK_
SEL_R
DSPXOR_CK
CONF_MOD_
MCBSP1_CLKS_
SEL_R
DSPPER_CK
CONF_MOD_
MCBSP3_CLK_
SEL_R
DSPXOR_CK
DSPXOR_CK
DSPXOR_CK
DMA_
LCDFREE_CK
MOD_CONF_
CTRL_1
(OMAP5912
Configuration)
CONF_MODE_
CLK_SEL[16]
CONF_MODE_
2
CLK_SEL[19:17]
SPRU751A

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