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DMA Transmit and Receive Protocol in Master Mode
SPRU760B
The protocol has several steps:
Step 1: MCU-DSP writes to the setup and control registers (SPI_SET1,
SPI_SET2, and SPI_CTRL).
When DMA_EN is set, a transmit DMA request is generated, once the
RD and WR bits are set.
Step 2: The DMA writes the data in the transmit register (SPI_TX). Once the
data is written:
The transmit DMA request is released.
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TX_EMPTY is reset in the data status register (SPI_DSR).
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The transmit register (SPI_TX) is copied into the shift register
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(SPI_SR).
The device enable goes low (nTSPENi), if CEi = 0 in SPI_SET2.
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The shift register clock (SRCLK) is activated and the transmis-
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sion and reception start.
Step 3: When the transmission and the reception are completed:
The device enable goes high (nTSPENi), if CEi = 0 in SPI_SET2.
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The shift register (SPI_SR) is copied into the receive register
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(SPI_RX).
RX_FULL and TX_EMPTY are set in the data status register
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(SPI_DSR).
A receive DMA request is generated.
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Step 4: Once the DMA reads the receive register (SPI_RX):
The RX_FULL status bit is reset in the data status register
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(SPI_DSR).
The receive DMA request is released.
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A transmit DMA request is generated.
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Another transmission and reception can start (Step 2 → Step 3
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→ Step 4 → Step 2 → Step 3 → Step4 →...).
To stop the process, the MCU-DSP has to reset the RD and WR bits
in the control register (SPI_CTRL).
SPI Master/Slave
Serial Interfaces
41
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