Texas Instruments OMAP5912 Reference Manual page 239

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

Table 94. Debug Data Register (DEBUG_DATA)
Bit
Name
31:0
DATA_SAV
Table 95. Debug Flag Register (DEBUG_FLAG)
Bit
Name
31:15
Reserved
14:13
HOST_ID
12:11
SMOD_SAV
10:9
CS_SAV
SPRU749A
Base Address = 0xFFFE C900, Offset = 0x08
Function
The value of MPU/OCP-I/system DMA data input
bus is saved when a read access has a size
mismatch, and the MPU data output bus is saved
when a write access is aborted or has a size
mismatch. If a read access is aborted, the value of
this register is irrelevant.
Base Address = 0xFFFE C900, Offset = 0x0C
Function
Indicates the host responsible for the abort
00: MPU
01: System DMA
10: OCP-I
11: Reserved
Encoded access mode for MPUI port.
00: Shared access MPUI port RAM, shared access
peripheral
01: Shared access MPUI port RAM, host only access
peripheral
10: Host only access MPUI port RAM, shared access
peripheral
11: Host only access MPUI port RAM, host only
access peripheral
Indicates the transaction chip-select on abort.
01: MPUI port memory chip-select
10: DSP TIPB peripheral or MPUI port control register
(depending upon address value for the aborted
transaction)
MPU and MPUI Port
R/W
Reset
R
0xFFFFFFFF
R/W
R/W
R
R
R
OMAP3.2 Subsystem
Reset
0x0000
00
11
00
181

Advertisement

Table of Contents
loading

Table of Contents