Texas Instruments OMAP5912 Reference Manual page 687

Rotation
3.1.16 Compatibility with OMAP 3.0 and 3.1
SPRU755B
This feature is enabled by setting the bit Constant_Fill_Enable in the channel
control register 2, DMA_CCR2. If this bit is enabled, the register DMA color
parameter, DMA_COLOR_L and DMA_COLOR_U, is used to specify the
color key.
If the data type, ES, is 8 or 16 bits, only the DMA_COLOR_L register is used;
if the data type is 32 bits, register DMA_COLOR_U is also used. See the
register description for more detailed information.
LCh Types Supporting this Feature
All LCh types with independent source and destination indexing support four
types of rotation: 0°, 90°, 180°, and 270°. This can be established with the help
of double indexed addressing; that is, separate element/frame indexing. See
section 3.1.10, Addressing Modes, for details of this addressing capability.
After reset, the DMA and all LChs default to the OMAP 3.0/3.1 programming
model. This is characterized by a reduced feature set, no LCH chaining, fewer
LChs, program and active register sets per LCh, and a restricted number of
interrupts (see Table 26).
New code for the DMA must use the programming model presented in
previous sections of this document. Future versions of the DMA will be
optimized for this programming model and new features will be added to it
rather than the 3.0/1 compatible mode.
The DMA described here does not exhibit the same cycle-by-cycle behavior
as previous implementations in OMAP 3.0/3.1 and hence time critical
applications must be reverified when upgrading.
Two orthogonal mechanisms control the compatibility modes of the system
DMA:
A global register bit controls the DMA register and interrupt mapping.
-
A register bit per logical channel controls the disabling/enabling of the
-
OMAP 3.0/1 programmers model.
Note:
OMAP 3.2 is configured from reset to be OMAP 3.1 binary compatible.
When in OMAP 3.1, compatible mode PCh-0 and 1 are dynamically shared
to serve the generic LChs.
2D P
√ √
Direct Memory Access (DMA) Support
System DMA
PD G D
√ √ √
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