Texas Instruments OMAP5912 Reference Manual page 836

Multimedia processor device overview and architecture
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Memory Interfaces for the EMIFS
Figure 6.
Multiplane Block Erase Operation
R/B_
60h
Address
Copy-Back Program Operation
30
Memory Interfaces
bit 6 (Ready/Busy_) of the NFMC status register. When the erase is
completed, the pass/fail status of each block is examined by reading the
extended pass/fail status of the NFMC status register (bit 1 to bit 4) using the
read
multi-plane status command (0x71). If not masked, an interrupt is asserted
when R/B_ returns to high state.
60h
Address
60h
The copy-back program quickly and efficiently rewrites data stored in one page
within the plane to another page within the same plane, without using an
external memory. Because the time-consuming sequentially reading and
reloading cycles are removed, system performance is improved. A normal
read operation with 0x00 command and the address of the source page moves
the whole 528-byte data into an NFMC internal buffer. As soon as the NFMC
returns to the ready state, command 0x8A with the address cycles of the
destination page is sent to the NFMC. The confirm command (0x10) is
required to begin the programming operation.
There is some restriction because the copy-back program operation is allowed
only within the same memory plane. Although a full address is sent, bits 7 to
0 of the address are discarded. The software must check the validity of page
addresses.
The source page and the destination page must be in the same plane:
-
For 512M bits, bit 14 and bit 15 of the address must be the same.
-
For 1G bit, bit 14, bit 15, and bit 26 of the address must be the same.
If the operation fails, software marks the block where the page belongs as
invalid (see Figure 7).
Address
60h
Address
T bers
D0h
SPRU756A

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