Texas Instruments OMAP5912 Reference Manual page 554

Ultralow-Power Device
Table 4. ULPD Output Clocks Description
OMAP5912 I/O
Destination
Clock Selected
BCLK Derived from APLL
CLK/2
MCLK Derived from APLL
CLK/2
UART2 System clock
USB.CLKO EXT.48M divided
by 8
APLL CLK/2
SYS_CLK_OUT System clock
36 Power Management
Clock Source
Selection
SDW_SYSCLK_
PLLCLK_SEL
CLOCK_CTRL_
REG[2]
SDW_CLK_DIV_
CTRL_SEL[7:2]
(see Note 1)
COM_SYSCLK_
PLLCLK_SEL
CONF_MOD_COM_
MCLK_12_48_
SEL_R
CONF_DPLL_EXT_
SEL
(see Note 2)
CLOCK_CTRL_
REQ[1]
COM_RATIO_
SEL[7:2]
(see Note 3)
CLOCK_CTRL_
REG[0]
CONF_DPLL_EXT_
SEL
CLOCK_CTRL_
REG[4]
CLOCK_CTRL_
REG[3]
Wake-up Soft Request
Request Disable
BCLKREQ SOFT_DISABLE_
REQ_REG[1]
MCLKREQ SOFT_DISABLE_
REQ_REG[0]
SOFT_REQ_
REG[6]
COM_CLK_DIV_
CTRL_SEL[1]
SOFT_REQ_
REG[1]
OMAP3.2 SOFT_DISABLE_
wake-up request REQ_REG[3]
UART2 request
for system clock
SOFT_REQ_
REG[5]
Clock request to
APLL
SOFT_REQ_
REG[0]
MCLKREQ SOFT_DISABLE_
REQ_REG[0]
SOFT_REQ_
REG[1]
SPRU753A