Texas Instruments OMAP5912 Reference Manual page 968

Table 1. MPU/DSP Peripheral Access (Continued)
MPU Domain
Module MPU Start
Name
MPU level FFFE 0000
2 interrupt
handler
MPUIO FFFB 5000
GPIO1 FFFB E400 FFFB E7FF
GPIO2 FFFB
EC00
GPIO3 FFFB B400 FFFB B7FF
GPIO4 FFFB
BC00
PWL FFFB 5800
PWT FFFB 6000
GP FFFB 1400
timer 1
GP FFFB
timer 2 1C00
GP FFFB 2400
timer 3
GP FFFB
timer 4 2C00
GP FFFB 3400
timer 5
GP FFFB
timer 6 3C00
GP FFFB 7400
timer 7
Note: The SSI and the GDD modules are on the L3-OCP2 port and thus are seen as part of memory port interface.
SPRU758A
MPU End MPU TIPB
Bus Type
FFFE 07FF Private
FFFB 57FF Shared
Shared
FFFB EFFF Shared
Shared
FFFB BFFF Shared
FFFB 5FFF Shared
FFFB 67FF Shared
FFFB 17FF Shared
FFFB 1FFF Shared
FFFB 27FF Shared
FFFB 2FFF Shared
FFFB 37FF Shared
FFFB 3FFF Shared
FFFB 77FF Shared
DSP Domain
L4 Controler DSP Start
Switch
Dynamic E101 E400
Dynamic E101 EC00 E101
Dynamic E101 B400
Dynamic E101 BC00 E101
Semi-static E101 1400
Semi-static E101 1C00
Semi-static E101 2400
Semi-static E101 2C00
Semi-static E101 3400
Semi-static E101 3C00
Semi-static E101 7400
Peripheral Interconnects
Shared Peripherals
DSP End DSP TIPB
Bus Type
E101 Shared
E7FF
Shared
EFFF
E101 Shared
B7FF
Shared
BFFF
E101 Shared
17FF
E101 Shared
1FFF
E101 Shared
27FF
E101 Shared
2FFF
E101 Shared
37FF
E101 Shared
3FFF
E101 Shared
77FF
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