Texas Instruments OMAP5912 Reference Manual page 966

Multimedia processor device overview and architecture
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Table 1.
MPU/DSP Peripheral Access (Continued)
MPU Domain
Module
MPU Start
Name
OMAP
FFFE 1000
5912
configuratio
n
32-kHz
FFFB
synchroniz
C400
ation
counter
Secure
FFFE A800 FFFE AFFF Private
watchdog
32-kHz
FFFE B000 FFFE B7FF
watchdog
RTC
FFFB 4800
RNG
FFFE 5000
DES/3DES
FFFE 4000
SHA-
FFFE 4800
1/MD5
OMAP
FFFE
MPU timer1
C500
OMAP
FFFE
MPU timer2
C600
OMAP
FFFE
MPU timer3
C700
OMAP
FFFE
watchdog
C800
timer
OS timer
FFFB 9000
L3 OCP
FFFE
initiator
C300
Note:
The SSI and the GDD modules are on the L3-OCP2 port and thus are seen as part of memory port interface.
SPRU758A
MPU End
MPU TIPB
Bus Type
FFFE 17FF
Private
FFFB C7FF Shared
Private
FFFB 4FFF
Shared
FFFE 57FF
Private
FFFE 47FF
Private
FFFE 4FFF
Private
FFFE C5FF Private
FFFE C6FF Private
FFFE C7FF Private
FFFE C8FF Private
FFFB 93FF
Shared
FFFE C3FF Private
DSP Domain
L4 Controler
DSP Start
Switch
Dynamic
E101 C400
Peripheral Interconnects
Shared Peripherals
DSP End
DSP TIPB
Bus Type
E101
Shared
C7FF
15

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