Texas Instruments OMAP5912 Reference Manual page 341

Multimedia processor device overview and architecture
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DSP Memory Management Unit
Table 23.
MSB Fault Address Register (FAULT_AD_H_REG)
Bit
Name
31:8
Unused
7:0
Fault_address_msb
Table 24.
LSB Fault Address Register (FAULT_AD_L_REG)
Bit
Name
31:16
Unused
15:0
Fault_address_lsb
Table 25.
Fault Status Register (FAULT_ST_REG)
Bit
Name
31:4
Unused
3
Prefetch_err
2
Perm_fault
1
Tlb_miss
0
Trans_fault
Table 26. It Acknowledge Register (IT_ACK_REG)
Bit
Name
31:1
Unused
0
It_ack
78
DSP Subsystem
Base Address = FFFE D200, Offset = 00C
Function
MSB of logical address of the access that
generated a permission fault
Base Address = FFFE D200, Offset = 010
Function
LSB of logical address of the access that
generated a permission fault
Base Address = FFFE D200, Offset = 014
Function
This error occurs during a prefetch
Active high
Permission fault
Active high
TLB miss (when WTB is disabled)
Active high
Translation fault (invalid descriptor)
Active high
These fault registers contain the logical address from the DSP that generated
the interruption.
Base Address = FFFE D200, Offset = 018
Function
Writing 1 in this register acknowledges the interrupt.
Reset
R/W
0
R
Reset
R/W
0
R
Reset
R/W
0
R
0
R
0
R
0
R
Reset
R/W
0
W
SPRU750A

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