Texas Instruments OMAP5912 Reference Manual page 981

Layer 4 Interconnect
Table 6. Static Switch Configuration Registers Offset Addresses (Continued)
Register Name
UART2_SSW_DSP_CONF
UART3_SSW_MPU_CONF
UART3_SSW_DSP_CONF
McBSP_SSW_MPU_CONF
McBSP_SSW_DSP_CONF
I2C_SSW_MPU_CONF
I2C_SSW_DSP_CONF
SPI_SSW_MPU_CONF
SPI_SSW_DSP_CONF
TIMER1_SSW_MPU_CONF
TIMER1_SSW_DSP_CONF
TIMER2_SSW_MPU_CONF
TIMER2_SSW_DSP_CONF
TIMER3_SSW_MPU_CONF
TIMER3_SSW_DSP_CONF
TIMER4_SSW_MPU_CONF
TIMER4_SSW_DSP_CONF
TIMER5_SSW_MPU_CONF
TIMER5_SSW_DSP_CONF
TIMER6_SSW_MPU_CONF
TIMER6_SSW_DSP_CONF
TIMER7_SSW_MPU_CONF
TIMER7_SSW_DSP_CONF
TIMER8_SSW_MPU_CONF
TIMER8_SSW_DSP_CONF
NFCtrl_SSW_MPU_CONF
30 Peripheral Interconnects
# Bits Offset
16
16/32 0x040
16
16/32 0x090
16
16/32 0x0A0
16
16/32 0x0B0
16
16/32 0x0C0
16
16/32 0x0D0
16
16/32 0x0E0
16
16/32 0x0F0
16
16/32 0x100
16
16/32 0x110
16
16/32 0x130
16
16/32 0x140
16
16/32 0x150
Bus
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
DSP
MPU
SPRU758A