Texas Instruments OMAP5912 Reference Manual page 236

MPU and MPUI Port
Table 91. MPUI Registers (Continued)
Name
MPUI_STATUS
DSP_STATUS
DSP_BOOT_CONFIG
DSP_MPUI_CONFIG
DSP_MISC
MPUI_ENHANCED_
CTRL
Table 92. MPUI Control Register (MPUI_CONTROL)
Bit Name
31:23 Reserved
22:21 WORD_SWAP_CTL
20:18 ACCESS_PRIORITY
Note: For 32-bit words, enabling byte swaps with BYTE_SWAP_CTL does the following: (1) performs a 16-bit word swap, (2)
within those 16-bit words, a byte swap occurs.
178 OMAP3.2 Subsystem
Base Address = 0xFFFE C900
Description
MPUI status register
DSP status register
DSP boot configuration register
MPUI port RAM configuration register
DSP miscellaneous
MPUI enhanced control register
Base Address = 0xFFFE C900, Offset = 0x00
Function
Bits to control word (16-bit swap) between MPUI and
MPUI port for a 32-bit access:
00: Word swap for all accesses (OMAP 3.0)
01: Word swap only for DSP TIPB peripheral and
MPUI port control/ status register accesses
10: Word swap only for MPUI port RAM accesses
11: Turn off word swap for all accesses.
MPUI access priority between MPU, OCP-I, and
system DMA requests:
(Note: The lower the number, the higher the priority)
000: MPU → 1 DMA → 2 OCP-I → 3
001: MPU → 1 DMA → 3 OCP-I → 2
010: MPU → 2 DMA → 1 OCP-I → 3
011: MPU → 2 DMA → 3 OCP-I → 1
1X0: MPU → 3 DMA → 1 OCP-I → 2
1X1: MPU → 3 DMA → 2 OCP-I → 1
R/W Offset
R/W 0x10
R/W 0x14
R/W 0x18
R/W 0x1C
R/W 0x20
R/W 0x24
R/W Reset
R/W 00
R/W 000
SPRU749A