Texas Instruments OMAP5912 Reference Manual page 1032

Table 25. MPU Control Timer Register (MPU_CNTL_TIMER) (Continued)
Base Address = 0xFFFE C500, 0xFFFE C600, 0xFFFE C700, Offset = 0x00
Bit Name
5 CLOCK_ENABLE
4:2 PTV
1 AR
0 ST
Table 26. MPU Load Timer Register Value (MPU_LOAD_TIMER)
Base Address = 0xFFFE C500, 0xFFFE C600, 0xFFFE C700, Offset = 0x04
Bit Name
31:0 MPU_LOAD_TIMER
Table 27. MPU Read Timer Register Value (MPU_READ_TIMER)
Base Address = 0xFFFE C500, 0xFFFE C600, 0xFFFE C700, Offset = 0x08
Bit Name
31:0 MPU_READ_TIMER
SPRU759B
Function
Enable input reference clock to the MPU OS timer
module
Prescale timer input reference clock
0: One-shot mode
1: Autoreload mode
0: Stop timer value decrement
1: Start timer value decrement
If one-shot mode is selected (AR = 0), this bit is
automatically reset by internal logic when the timer
value is equal to 0.
Function
This value is loaded when the timer passes through 0
or when it starts.
Function
Value of the timer
OMAP3.2 Operating System Timer
R/W
R/W
R/W
R/W
R/W
R/W
W
R/W
R
Timers
Reset
0
000
0
0
Reset
UD
Reset
UD
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