Texas Instruments OMAP5912 Reference Manual page 132

Multimedia processor device overview and architecture
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3.2.16
Dynamic Auto Idle and System Idle Synchronization
3.2.17
Abort Management
74
OMAP3.2 Subsystem
-
The EXTPWR bit field in the ARM_EWUPCT register is used to specify the
minimum time between FLASH.RP deasserted and TC going out of idle
state (See section 4.3.4).
-
EMIFS supports auto idle mode (clock gating) to dynamically reduce
power consumption when no requests are pending and no accesses are
on-going. The dynamic auto idle mode is enabled by setting to 1 the
PWD_EN bit field of EMIFS configuration register.
-
Upon clock and reset idle request, the EMIFS can send the idle request
acknowledge when all on going transactions are completed. This allows
the clock and reset module to cut the EMIFS source clock properly. The
idle request acknowledge process is enabled by setting to 1 the PDE bit
field of EMIFS configuration register (see Table 18).
The EMIFS can issue an interrupt in two cases of abort scenario:
-
Restricted access mode violation on CS0
J
Access to CS0 address space is limitted to the MPU
J
When an access to CS0 space is initiated by the DMA, the DSP, or the
OCP-I, the EMIFS completed the access giving back a 0 value as read
value or without writing the given value to the final destination.
J
The EMIFS raises a TC abort interrupt (IRQ_ABORT) sets the abort
flag bit, sets the restricted access error status bit, and updates the host
ID bit field in the abort type register. The EMIFS updates the abort
address register with the requested address causing the access
violation.
J
The abort flag bit is cleared when the abort type register is read.
-
Time-out issue during any access in case of full-handshaking mode
J
This feature can be enabled with the TIMEOUT_EN bit field and with
an 8-bit TIMEOUT programmable value (expressed in REF_CLK
cycles) in the EMIFS abort time-out register (see Table 12).
J
On beginning of an access, the time-out counter starts counting down.
If the counter reaches 0 before the device response, the EMIFS raises
an interrupt, sets the abort flag bit, sets the time out error status bit and
updates the host ID bit field in the abort type register. The EMIFS
updates the abort address register with the requested address
causing the access time out.
SPRU749A

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