Texas Instruments OMAP5912 Reference Manual page 484

Multimedia processor device overview and architecture
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Table 36. Module Configuration Control 0 Register (MOD_CONF_CTRL_0)
(Continued)
Bit
Name
19
CONF_MOD_MCBSP3_
CLK_SEL_R
18
CONF_MOD_MCBSP1_
CLKS_SEL_R
17
CONF_MOD_USB_W2FC_
VBUS_MODE_R
16
CONF_MOD_I2C_SELECT
_R
15
CONF_MOD_UART3_
IRDA_MODE_R
14
CONF_MOD_MCBSP1_
CLK_SEL_R
Notes:
1) This function has been removed. Writing a 1 or a 0 to this register is acceptable. However, it is recommended
to write a 0, in case functions are added to this register space in the future.
SPRU752B
Base Address = 0xFFFE 1000, Offset Address = 0x80
Function
This bit determines the method of frame sync
wrap-around used on MCBSP3.
0: Wrap-around done in hardware external to
the McBSP (3 pins mode).
1: Wrap-around disabled. Wrap-around can be
performed within the McBSP module (4 pins
mode).
This bit also selects the Interface clock used for
the McBSP3 module:
0: DSPXOR_CLK is selected.
1: DSPPER_CLK is selected.
This register selects the clock used for the
McBSP1 clocks input:
0: McBSP1.CLKS pin of the device.
1: OMAP DPLL1 clockout.
This bit determines the method used for USB
VBUS detection.
0: The VBUS detection is controlled by GPIO_0
state (if in muxed mode 2).
1: The VBUS detection is controlled by DVDD2
detection on the line.
See Note 1.
See Note 1.
This register selects the clock used for the
McBSP1 module:
0: DSPXOR_CLK is selected.
1: DSPPER_CLK is selected.
Configuration
R/W
Reset
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
Initialization
67

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